A 64Mb SRAM in 32nm High-k metal-gate SOI technology with 0.7V operation enabled by stability, write-ability and read-ability enhancements.
Harold PiloIgor ArsovskiKevin BatsonGeordie BracerasJohn GabricRobert M. HouleSteve LamphierFrank PavlikAdnan SeferagicLiang-Yu ChenShang-Bin KoCarl RadensPublished in: ISSCC (2011)