Eiji Yamasaki

Publication Activity (10 Years)

Years Active: 1994-2001
Publications (10 Years): 0

Publications

Yuji Yokoyama, Nobutaka Itoh, Masatoshi Hasegawa, Masahiro Katayama, Hiroshi Akasaki, Masayuki Kaneda, Toshitsugu Ueda, Yousuke Tanaka, Eiji Yamasaki, Masaya Todokoro, Keinosuke Toriyama, Hiroshi Miki, Masayoshi Yagyu, Kazumasa Takashima, Toru Kobayashi, Syuichi Miyaoka, Nobuo Tamba
A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory-cell area efficiency of 33%. IEEE J. Solid State Circuits 36 (3) (2001)
Yuji Yokoyama, Nybutaka Itoh, Masap Katayama, Kazumasa Takashima, Hiroshi Akasaki, Masayuki Kaneda, Toshitsugu Ueda, Yousuke Tanaka, Eiji Yamasaki, Masaya Todokoro, Keinosuke Toriyama, Hiroshi Miki, Masayoshi Yagyu, Tom Kobayashi, Syuichi Miyaoka, Nobuo Tamba
A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory cell efficiency of 33%. CICC (2000)
Takeshi Sakata, Masashi Horiguchi, Tomonori Sekiguchi, Shigeki Ueda, Hitoshi Tanaka, Eiji Yamasaki, Yoshinobu Nakagome, Masakazu Aoki, Toru Kaga, Makoto Ohkura, Ryo Nagai, Fumio Murai, Toshihiko Tanaka, Shimpei Iijima, Natsuki Yokoyama, Yasushi Gotoh, Ken'ichi Shoji, Teruaki Kisu, Hisaomi Yamashita, Takashi Nishida, Eiji Takeda
An experimental 220-MHz 1-Gb DRAM with a distributed-column-control architecture. IEEE J. Solid State Circuits 30 (11) (1995)
Hitoshi Tanaka, Yoshinobu Nakagome, Jun Etoh, Eiji Yamasaki, Masakazu Aoki, Kazuyuki Miyazawa
Sub-1-μA dynamic reference voltage generator for battery-operated DRAMs. IEEE J. Solid State Circuits 29 (4) (1994)