Devarshi Mrinal Das

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 30

Top Topics

Associative Memory

Top Venues

IET Circuits Devices Syst.

Publications

Sahibia Kaur Vohra, Sherin A. Thomas, Mahendra Sakare, Devarshi Mrinal Das
Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons. Integr. 95 (2024)
Azhar Yaseen N. J, Shivdeep, Sahil Sharma, Hitesh Shrimali, Devarshi Mrinal Das
A 66dBΩ 5 GHz and 44.88 √Hz/(pA·pW) Inductorless TIA in 65 nm CMOS. MIXDES (2024)
Kanupriya Varshney, Mani Shankar Yadav, Devarshi Mrinal Das, Brajesh Rawat
Finding a Promising Oxide Material for Resistive Random Access Memory with Graphene Electrode. VLSID (2024)
Dibya Chowdhury, Shivdeep, Devarshi Mrinal Das
A Pulse Oximeter and a Controller Designed for Automatic Regulation of Oxygen Concentrators. VLSID (2024)
Sherin A. Thomas, Suyash Kushwaha, Rohit Sharma, Devarshi Mrinal Das
Modeling and Comparing the Impact of Resistive and Capacitive Crossbar Associated Parasitics of Neuromorphic Circuits. MIXDES (2024)
Nidhi Sharma, Sahil Sharma, Devarshi Mrinal Das
A 66 $\mu \mathrm{W}$ Asynchronous Time-Domain Bulk-Tuned Offset Cancellation Circuit for High-Precision Dynamic Comparator. MIXDES (2024)
Sahil Sharma, Shivdeep, Nidhi Sharma, Devarshi Mrinal Das
Low Input Capacitance Low Power Fully Differential Neural Amplifier. MIXDES (2024)
Mayank Kumar Singh, Manish Kumar Gautam, Puneet Singh, R. Nagulapalli, Devarshi Mrinal Das, Mahendra Sakare
A Double Cross-Coupled Delay Cell for High-Frequency Differential Ring VCOs. APCCAS (2023)
Mohd Asim Saeed, Manoj Kumar, B. Umapathi, Devarshi Mrinal Das
Optimization of Slew Mitigation Capacitor in Passive Charge Compensation-Based Delta-Sigma Modulator. IEEE Trans. Circuits Syst. II Express Briefs 70 (6) (2023)
Sahibia Kaur Vohra, Alex P. James, Mahendra Sakare, Devarshi Mrinal Das
Analysing Mismatch effect of CMOS Neurons in Spiking Neural Network with Winner-take-all Mechanism. NorCAS (2023)
Mayank Kumar Singh, Puneet Singh, Upendra Chichhula, Hirensh Mehra, Devarshi Mrinal Das, Mahendra Sakare
A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks. Circuits Syst. Signal Process. 42 (11) (2023)
Sahibia Kaur Vohra, Sherin A. Thomas, Shivdeep, Mahendra Sakare, Devarshi Mrinal Das
Full CMOS Circuit for Brain-Inspired Associative Memory With On-Chip Trainable Memristive STDP Synapse. IEEE Trans. Very Large Scale Integr. Syst. 31 (7) (2023)
Mayank Kumar Singh, Puneet Singh, Devarshi Mrinal Das, Mahendra Sakare
A Low Power Differential Delay Cell without Cross-Coupled Latch for Ring VCO. PRIME (2023)
Sahibia Kaur Vohra, Sherin A. Thomas, Mahendra Sakare, Devarshi Mrinal Das
CMOS Circuit Implementation of Spiking Neural Network for Pattern Recognition Using On-chip Unsupervised STDP Learning. CoRR (2022)
Nidhi Sharma, Vinayak Hande, Rajesh Kumar Srivastava, Devarshi Mrinal Das
6-bit 1-GS/s Partially Active Flash ADC with Comparator Offset Correction. iSES (2022)
Soniya Chittoriya, Shivdeep, Kundan Kumar Jha, Devarshi Mrinal Das, Rohit Sharma
A Low-Overhead PUF Based Hardware Security Technique to Prevent Scan Chain Attacks for Industry-Standard DFT Architecture. MWSCAS (2022)
Shubham Kumar, Devarshi Mrinal Das
Python-LTspice Co-Simulation to Train Neural Networks with Memristive Synapses to Learn Logic Gate Operations. iSES (2021)
Mayank Kumar Singh, Puneet Singh, Devarshi Mrinal Das, Mahendra Sakare
-1 PRBS generator using Exclusive-OR gate merged D flip-flops. MWSCAS (2021)
Sherin A. Thomas, Sahibia Kaur Vohra, Rahul Kumar, Rohit Sharma, Devarshi Mrinal Das
Analysis of Parasitics on CMOS based Memristor Crossbar Array for Neuromorphic Systems. MWSCAS (2021)
Soumyashib Das, Sanjay Wadhwa, Devarshi Mrinal Das
A CMOS based High Resolution All-Digital Temperature Sensor with Low Power Supply Sensitivity. MWSCAS (2021)
Sahibia Kaur Vohra, Sherin A. Thomas, Mahendra Sakare, Devarshi Mrinal Das
Analytical Modelling of a CMOS Inter Spike Interval Decoder for Resistive Crossbar based Brain Inspired Computing. VDAT (2021)
Shivdeep, Sahibia Kaur Vohra, Neeraj Goel, Devarshi Mrinal Das
A Robust Training Signal Generator for Trainable Memristive Digital to Analog Converter. iSES (2021)
Sahibia Kaur Vohra, Sherin Thomas, Mahendra Sakare, Devarshi Mrinal Das
Full CMOS Implementation of Bidirectional Associative Memory Neural Network with Analog Memristive Synapse. MWSCAS (2021)
Devarshi Mrinal Das, Kashyap Barot, Abhishek Srivastava, Maryam Shojaei Baghini
Noise-power-area optimised design procedure for OTAs with complementary input transistors for neural amplifiers. IET Circuits Devices Syst. 14 (5) (2020)
Arijit Karmakar, Devarshi Mrinal Das, Maryam Shojaei Baghini
Adaptive analogue calibration technique to compensate electrode motion artefacts in biopotential recording. IET Circuits Devices Syst. 14 (3) (2020)
Devarshi Mrinal Das, Amogh Vidwans, Abhishek Srivastava, Meraj Ahmad, Saujal Vaishnav, Sourya Dewan, Maryam Shojaei Baghini
Design and development of an Internet-of-Things enabled wearable ExG measuring system with a novel signal processing algorithm for electrocardiogram. IET Circuits Devices Syst. 13 (6) (2019)
Devarshi Mrinal Das, Aman Gupta, Abhishek Srivastava, Amogh Vidwans, Meraj Ahmad, Aniruddha Shelke, Salil Kale, J. Ananthapadmanabhan, Dinesh Kumar Sharma, Maryam Shojaei Baghini
, with embedded signal processing using an ultra-low power ASIC designed for testability. Microelectron. J. 72 (2018)
Devarshi Mrinal Das, Abhishek Srivastava, Aman Gupta, Kashyap Barot, Maryam Shojaei Baghini
A noise-power-area optimized novel programmable gain and bandwidth instrumentation amplifier for biomedical applications. ISCAS (2017)
Devarshi Mrinal Das, Abhishek Srivastava, J. Ananthapadmanabhan, Meraj Ahmad, Maryam Shojaei Baghini
A novel low-noise fully differential CMOS instrumentation amplifier with 1.88 noise efficiency factor for biomedical and sensor applications. Microelectron. J. 53 (2016)
Priyanka Kimtee, Devarshi Mrinal Das, Maryam Shojaei Baghini
A mismatch insensitive reconfigurable discrete time biosignal conditioning circuit in 180 nm MM CMOS technology. VDAT (2016)
Devarshi Mrinal Das, J. Ananthapadmanabhan, Maryam Shojaei Baghini, Dinesh Kumar Sharma
Design considerations for high-CMRR low-power current mode instrumentation amplifier for biomedicai data acquisition systems. ICECS (2014)