Hitesh Shrimali

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 34

Top Topics

Vlsi Architecture

Medical Devices

Top Venues

Publications

Azhar Yaseen N. J, Shivdeep, Sahil Sharma, Hitesh Shrimali, Devarshi Mrinal Das
A 66dBΩ 5 GHz and 44.88 √Hz/(pA·pW) Inductorless TIA in 65 nm CMOS. MIXDES (2024)
Saurabh Dhiman, Hitesh Shrimali
On Minimizing Charge Injection Error Using Multi-Dummy Switches With Enhanced Linearity. Integr. 97 (2024)
Saurabh Dhiman, Hitesh Shrimali
·ns Comparator with Dynamic-cum-Body Bias Technique in SOI. ISCAS (2024)
Saurabh Dhiman, Hitesh Shrimali
Corrigendum to "On minimizing charge injection error using multi-dummy switches with enhanced linearity" [Integration volume 97 (2024) 102175]. Integr. 97 (2024)
Sowmyashree S, Hitesh Shrimali
An On-chip Thermoelectric Cooler Controller With Improved Driving Current of 2 A at 0.5 Ω Load. VLSID (2024)
Sowmyashree S, Hitesh Shrimali
A Low Noise Bandgap Reference with 0.89 V Vref, 0.88 μVrms noise and 80 dB of PSRR. VLSID (2023)
Sowmyashree S, Hitesh Shrimali
Fully Monolithic 1A Thermoelectric Cooler Controller with 90% Efficiency. ICECS (2023)
Muhammed Suhail Illikkal, Jai Narayan Tripathi, Vijender Kumar Sharma, Hitesh Shrimali, Ramachandra Achar
Novel Observations and Physical Insights on PSIJ Behavior in CMOS Chain-of-Inverters. IEEE Access 10 (2022)
B. Dinesh Kumar, Hitesh Shrimali
Design and implementation of a second order PLL based frequency synthesizer for implantable medical devices. Integr. 86 (2022)
Kumar Sambhav Pandey, Hitesh Shrimali
Novel VLSI Architectures and Micro-Cell Libraries for Subscalar Computations. IEEE Access 10 (2022)
B. Dinesh Kumar, Hitesh Shrimali, Nagarjuna Nallam
A Low-Power Quadrature LC-Oscillator Using Core-and-Coupling Current-Reuse. ISCAS (2021)
Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma
Digitally Assisted Secondary Switch-and-Compare Technique for a SAR ADC. IEEE Trans. Circuits Syst. II Express Briefs 68 (7) (2021)
Gowtham Peringattu Kalarikkal, Rohit Goel, Hitesh Shrimali
Design of CMOS Device Process Sensor in 28 nm FD-SOI with 2 % of Frequency Spread. ICECS (2021)
Navneet Gupta, Hitesh Shrimali, Adam Makosiej, Andrei Vladimirescu, Amara Amara
Energy Efficient Comparator-Less Current-Mode TFET-CMOS Co-Integrated Scalable Flash ADC. MWSCAS (2021)
Puneet Arora, Jai Narayan Tripathi, Hitesh Shrimali
Analytical Modeling of Power Supply Induced Jitter in CMOS Inverters due to Periodic Fluctuations. NEWCAS (2021)
Saurabh Dhiman, Vijender Kumar Sharma, Hitesh Shrimali
Design and Analysis of a Low PSIJ, Energy Efficient Bootstrapped Driver for Space Application. ISCAS (2020)
Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma
A Discrete-Time MOS Parametric Amplifier-Based Chopped Signal Demodulator. IEEE Trans. Very Large Scale Integr. Syst. 28 (11) (2020)
B. Dinesh Kumar, Sumit K. Pandey, Navneet Gupta, Hitesh Shrimali
Design of hybrid flash-SAR ADC using an inverter based comparator in 28 nm CMOS. Microelectron. J. 95 (2020)
Vijender Kumar Sharma, Jai Narayan Tripathi, Hitesh Shrimali
Deterministic Noise Analysis for Single-Stage Amplifiers by Extension of Indefinite Admittance Matrix. IEEE Open J. Circuits Syst. 1 (2020)
Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma
Reduced switching mode for SAR ADCs: analysis and design of SAR A-to-D algorithm with periodic standby mode circuit components. IET Circuits Devices Syst. 14 (5) (2020)
Vijender Kumar Sharma, B. Dinesh Kumar, Muhammed Suhail Illikkal, Jai Narayan Tripathi, Navneet Gupta, Hitesh Shrimali
Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator. ISCAS (2019)
Saurabh Dhiman, Indu Yadav, Hitesh Shrimali
Energy Efficient Bootstrapped Driver for a Particle Detector in 180 nm SOI Technology. APCCAS (2019)
Jai Narayan Tripathi, Muhammed Suhail Illikkal, Hitesh Shrimali, Ramachandra Achar
A Thomas Algorithm-Based Generic Approach for Modeling of Power Supply Induced Jitter in CMOS Buffers. IEEE Access 7 (2019)
Indu Yadav, Ashish Joshi, Ettore Ruscino, Valentino Liberali, Attilio Andreazza, Hitesh Shrimali
Design of a Charge Sensitive Amplifier for Silicon Particle Detector in BCD 180 nm Process. VLSI Design (2019)
Indu Yadav, Ashish Joshi, Ettore Ruscino, Valentino Liberali, Attilio Andreazza, Hitesh Shrimali
Design of HV-CMOS Detectors in BCD Technology with Noise and Crosstalk Measurements. ICECS (2019)
Kumar Sambhav Pandey, B. Dinesh Kumar, Neeraj Goel, Hitesh Shrimali
An Ultra-Fast Parallel Prefix Adder. ARITH (2019)
B. Dinesh Kumar, Hitesh Shrimali, Navneet Gupta
A 6-Bit, 29.56 fJ/Conv-Step, Voltage Scalable Flash-SAR Hybrid ADC in 28 nm CMOS. ISCAS (2019)
Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma
The Capacitively Coupled Chopper Stabilized Amplifier with a DTPA based Demodulator. ISCAS (2018)
Ankita Deo, Sumit K. Pandey, Ashish Joshi, Satinder K. Sharma, Hitesh Shrimali
Design of a Third Order Butterworth Gm-C Filter for EEG Signal Detection Application. MIXDES (2018)
Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma
Systematic design approach for a gain boosted telescopic OTA with cross-coupled capacitor. IET Circuits Devices Syst. 11 (3) (2017)
Hitesh Shrimali, Vijender Kumar Sharma, Jai Narayan Tripathi, Rakesh Malik
Nonlinear modeling and analysis of buck converter using volterra series. ICECS (2017)
Vijender Kumar Sharma, Hitesh Shrimali, Jai Narayan Tripathi, Rakesh Malik
Distortion analysis for a DC-DC buck converter. ISOCC (2017)
Ashish Joshi, Indu Yadav, Satinder K. Sharma, Hitesh Shrimali
The pole-zero doublet: A cascode operational amplifier with cross coupled capacitor. MWSCAS (2016)
Hitesh Shrimali, Shouri Chatterjee
A technique to linearize the discrete-time parametric amplifier. Microelectron. J. 46 (11) (2015)
Hitesh Shrimali, Valentino Liberali
The start-up circuit for a low voltage bandgap reference. ICECS (2014)
Hitesh Shrimali, Shouri Chatterjee
Third order harmonic cancellation technique for a parametric amplifier. ISCAS (2011)
Hitesh Shrimali, Shouri Chatterjee
11 GHz UGBW Op-amp with feed-forward compensation technique. ISCAS (2011)
Hitesh Shrimali, Shouri Chatterjee
Distortion Analysis of a Three-Terminal MOS-Based Discrete-Time Parametric Amplifier. IEEE Trans. Circuits Syst. II Express Briefs (12) (2011)