David Freitas

Publication Activity (10 Years)

Years Active: 2011-2023
Publications (10 Years): 1

Top Topics

Cmos Technology

Top Venues

IEEE J. Solid State Circuits

Publications

João Magalhães, David Freitas, Otávio Júnior, César Marcon
EMPC-SA: Error Correction Scheme using Modified Product Code for Space Applications. SBESC (2023)
Gautam R. Gangasani, Chun-Ming Hsu, John F. Bulzacchelli, Troy J. Beukema, William Kelly, Hui H. Xu, David Freitas, Andrea Prati, Daniele Gardellini, Robert Reutemann, Giovanni Cervelli, Juergen Hertle, Matthew Baecher, Jon Garlett, Pier Andrea Francese, John F. Ewen, David Hanson, Daniel W. Storaska, Mounir Meghelli
A 32 Gb/s Backplane Transceiver With On-Chip AC-Coupling and Low Latency CDR in 32 nm SOI CMOS Technology. IEEE J. Solid State Circuits 49 (11) (2014)
Gautam R. Gangasani, Chun-Ming Hsu, John F. Bulzacchelli, Sergey V. Rylov, Troy J. Beukema, David Freitas, William Kelly, Michael Shannon, Jieming Qi, Hui H. Xu, Joseph Natonio, Todd M. Rasmus, Jong-Ru Guo, Michael Wielgos, Jon Garlett, Michael Sorna, Mounir Meghelli
A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology. IEEE J. Solid State Circuits 47 (8) (2012)
Gautam R. Gangasani, Chun-Ming Hsu, John F. Bulzacchelli, Sergey V. Rylov, Troy J. Beukema, David Freitas, William Kelly, Michael Shannon, Jieming Qi, Hui H. Xu, Joseph Natonio, Todd M. Rasmus, Jong-Ru Guo, Michael Wielgos, Jon Garlett, Michael Sorna, Mounir Meghelli
A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology. CICC (2011)