A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology.
Gautam R. GangasaniChun-Ming HsuJohn F. BulzacchelliSergey V. RylovTroy J. BeukemaDavid FreitasWilliam KellyMichael ShannonJieming QiHui H. XuJoseph NatonioTodd M. RasmusJong-Ru GuoMichael WielgosJon GarlettMichael SornaMounir MeghelliPublished in: IEEE J. Solid State Circuits (2012)