Daniël Schinkel

Publication Activity (10 Years)

Years Active: 2004-2021
Publications (10 Years): 5

Top Topics

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Christiaan E. Lokin, Daniël Schinkel, Ronan A. R. van der Zee, Bram Nauta
Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology. IEEE Access 9 (2021)
Christiaan E. Lokin, Ronan A. R. van der Zee, Daniël Schinkel, Bram Nauta
EMI Reduction in Class-D Amplifiers by Actively Reducing PWM Ripple. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2020)
Harijot Singh Bindra, Chris E. Lokin, Daniël Schinkel, Anne-Johan Annema, Bram Nauta
A 1.2-V Dynamic Bias Latch-Type Comparator in 65-nm CMOS With 0.4-mV Input Noise. IEEE J. Solid State Circuits 53 (7) (2018)
Daniël Schinkel, Wouter Groothedde, Fred Mostert, Marto-Jan Koerts, Eric van Iersel, Daniel Groeneveld, Lucien J. Breems
A Multiphase Class-D Automotive Audio Amplifier With Integrated Low-Latency ADCs for Digitized Feedback After the Output Filter. IEEE J. Solid State Circuits 52 (12) (2017)
Fred Mostert, Daniël Schinkel, Wouter Groothedde, Lucien J. Breems, Remko van Heeswijk, Marto-Jan Koerts, Eric van Iersel, Daniel Groeneveld, Gertjan van Holland, Patrick Zeelen, Derk-Jan Hissink, Martin Pos, Paul Wielage, Fre Jorritsma, Marc Klein Middelink
5.1 A 5×80W 0.004% THD+N automotive multiphase Class-D audio amplifier with integrated low-latency ΔΣ ADCs for digitized feedback after the output filter. ISSCC (2017)
Hugo Westerveld, Daniël Schinkel, Ed van Tuijl
15.3 A 115dB-DR audio DAC with -61dBFS out-of-band noise. ISSCC (2015)
Michiel van Elzakker, Ed van Tuijl, Paul F. J. Geraedts, Daniël Schinkel, Eric A. M. Klumperink, Bram Nauta
A 10-bit Charge-Redistribution ADC Consuming 1.9 μ W at 1 MS/s. IEEE J. Solid State Circuits 45 (5) (2010)
Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects. IEEE J. Solid State Circuits 45 (2) (2010)
Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
Low-Power, High-Speed Transceivers for Network-on-Chip Communication. IEEE Trans. Very Large Scale Integr. Syst. 17 (1) (2009)
Michiel van Elzakker, Ed van Tuijl, Paul F. J. Geraedts, Daniël Schinkel, Eric A. M. Klumperink, Bram Nauta
A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC. ISSCC (2008)
Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
Optimal Positions of Twists in Global On-Chip Differential Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 15 (4) (2007)
Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
A 0.28pJ/b 2Gb/s/ch Transceiver in 90nm CMOS for 10mm On-Chip interconnects. ISSCC (2007)
Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time. ISSCC (2007)
Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed J. M. van Tuijl, Bram Nauta
A 3-Gb/s/ch transceiver for 10-mm uninterrupted RC-limited global on-chip interconnects. IEEE J. Solid State Circuits 41 (1) (2006)
T. S. Doorn, Ed van Tuijl, Daniël Schinkel, Anne-Johan Annema, Marco Berkhout, Bram Nauta
An audio FIR-DAC in a BCD process for high power class-D amplifiers. ESSCIRC (2005)
Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
Optimally-placed twists in global on-chip differential interconnects. ESSCIRC (2005)
Daniël Schinkel, Ed van Tuijl, Anne-Johan Annema
Reducing quantization noise with recursive Sigma Delta modulators. ISCAS (1) (2004)