Chung-Hsun Huang

Publication Activity (10 Years)

Years Active: 2000-2023
Publications (10 Years): 7

Top Topics

Signal Processing

Linear Interpolation

Top Venues

IEICE Electron. Express

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Tsung-Hsien Liu, Junzhe Chi, Bo-Lin Wu, Yee-Shao Chen, Chung-Hsun Huang, Yuan-Sun Chu
Design and Implementation of Machine Tool Life Inspection System Based on Sound Sensing. Sensors 23 (1) (2023)
Tzu-Hsiu Chen, Chung-Hsun Huang, Yuan-Sun Chu, Bo-Chao Cheng
Towards Efficient Neural Network on Edge Devices via Statistical Weight Pruning. GCCE (2020)
Chung-Hsun Huang, Wei-Chen Liao
A High-Performance LDO Regulator Enabling Low-Power SoC With Voltage Scaling Approaches. IEEE Trans. Very Large Scale Integr. Syst. 28 (5) (2020)
Tzu-Hsiu Chen, Chung-Hsun Huang, Yuan-Sun Chu
Lightweight Super-resolution Learning Model for Extremely Exposed Images. ICCBN (2020)
Kai-Tse Cheng, Chung-Hsun Huang, Yuan-Sun Chu, Bo-Chao Cheng, Pin-Sheng Cheng Chou
Low Cost Super-Resolution Scaling for Images with Over-Exposed and Saturated Scenes. GCCE (2018)
Chao-Yang Chang, Chung-Hsun Huang, Hui-Fu Chen, Chingwei Yeh, Yuan-Sun Chu, Tay-Jyi Lin
A low complexity edge-preserved image compression algorithm for LCD overdrive. GCCE (2016)
Chung-Hsun Huang, Chao-Yang Chang
An area and power efficient adder-based stepwise linear interpolation for digital signal processing. IEEE Trans. Consumer Electron. 62 (1) (2016)
Chung-Hsun Huang, Wei-Chen Liao
A compact programmable LDO regulator for ultra-low voltage SoC. IEICE Electron. Express 11 (20) (2014)
Chung-Hsun Huang, Ying-Ting Ma, Wei-Chen Liao
Design of a Low-Voltage Low-Dropout Regulator. IEEE Trans. Very Large Scale Integr. Syst. 22 (6) (2014)
Chung-Hsun Huang, Wei-Chen Liao, Chih-Ming Liao
A low-voltage high PSR LDO regulator with a simple ripple cancellation technique. IEICE Electron. Express 11 (20) (2014)
Chung-Hsun Huang, Wei-Jen Chen, Keng-Jui Chang, Yi-Hsuan Ting, Keng-Chang Hsu, Yu-Fu Pan, Chao-Chun Chen, Yuan-Hua Chu, Tay-Jyi Lin, Jinn-Shyan Wang
Low power fixed-latency DSP accelerator with autonomous minimum energy tracking (AMET). Hot Chips Symposium (2014)
Chao-Yang Chang, Chung-Hsun Huang, Yuan-Sun Chu
Efficient memory access methods for framebuffer-less video processing applications. ISCAS (2013)
Yi-Mao Hsiao, Yuan-Sun Chu, Chao-Yang Chang, Chung-Hsun Huang, Hsi-Hsun Yeh
A high throughput ASIC design for IPv6 routing lookup system. ISCAS (2013)
Yi-Mao Hsiao, Ming-Jen Chen, Yuan-Sun Chu, Chung-Hsun Huang
High-throughput intrusion detection system with parallel pattern matching. IEICE Electron. Express 9 (18) (2012)
Chao-Yang Chang, Pai-Cheng Tso, Chung-Hsun Huang, Po-Hui Yang
A fast wake-up power gating technique with inducing a balanced rush current. ISCAS (2012)
Chung-Hsun Huang, Chao-Chun Chen
A fast and high efficiency buck converter with Switch-On-Demand Modulator for wide load range applications. IEICE Electron. Express 8 (12) (2011)
Chung-Hsun Huang, Chao-Yang Chang
Low power and cost effective scaling engine with locking frame rate for display controllers. IEEE Trans. Consumer Electron. 57 (2) (2011)
Jinn-Shyan Wang, Yung-Chen Chien, Jia-Hong Lin, Chun-Yuan Cheng, Ying-Ting Ma, Chung-Hsun Huang
ADDLL/VDD-biasing co-design for process characterization, performance calibration, and clock synchronization in variation-tolerant designs. ASICON (2011)
Yi-Ming Wang, Jen-Tsung Yu, Yuandi Surya, Chung-Hsun Huang
A compact delay-recycled clock skew-compensation and/or duty-cycle-correction circuit. SoCC (2011)
Chung-Hsun Huang, Tzung-Lin Wu, Yi-Ming Wang
Adaptive Pseudo Dual Keeper for Wide Fan-In Dynamic Circuits. IEEE Trans. Circuits Syst. II Express Briefs (10) (2011)
Chung-Hsun Huang, Jinn-Shyan Wang, Chingwei Yeh, Chih-Jen Fang
The CMOS carry-forward adders. IEEE J. Solid State Circuits 39 (2) (2004)
Chung-Hsun Huang, Jinn-Shyan Wang
High-performance and power-efficient CMOS comparators. IEEE J. Solid State Circuits 38 (2) (2003)
Chung-Hsun Huang, Jinn-Shyan Wang, Yan-Chao Huang
Design of high-performance CMOS priority encoders and incrementer/decrementers using multilevel lookahead and multilevel folding techniques. IEEE J. Solid State Circuits 37 (1) (2002)
Chung-Hsun Huang, Jinn-Shyan Wang, Yan-Chao Huang
A high-speed CMOS incrementer/decrementer. ISCAS (4) (2001)
Jinn-Shyan Wang, Chung-Hsun Huang
High-speed and low-power CMOS priority encoders. IEEE J. Solid State Circuits 35 (10) (2000)