Cédric Hocquet

Publication Activity (10 Years)

Years Active: 2010-2014
Publications (10 Years): 0

Top Topics

Silicon On Insulator

Timing Constraints

Wireless Sensor Nodes

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

IEEE Trans. Emerg. Top. Comput.

Publications

Alessandro Barenghi, Cédric Hocquet, David Bol, François-Xavier Standaert, Francesco Regazzoni, Israel Koren
A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks. IEEE Trans. Emerg. Top. Comput. 2 (2) (2014)
David Bol, Julien De Vos, Cédric Hocquet, François Botman, François Durvaux, Sarah Boyd, Denis Flandre, Jean-Didier Legat
7-µW/MHz Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes. IEEE J. Solid State Circuits 48 (1) (2013)
David Bol, Cédric Hocquet, Francesco Regazzoni
CMOS Processes for Minimum Energy Under Timing Constraints. IEEE Trans. Circuits Syst. II Express Briefs (12) (2012)
David Bol, Julien De Vos, Cédric Hocquet, François Botman, François Durvaux, Sarah Boyd, Denis Flandre, Jean-Didier Legat
A 25MHz 7μW/MHz ultra-low-voltage microcontroller SoC in 65nm LP/GP CMOS for low-carbon wireless sensor nodes. ISSCC (2012)
Stéphanie Kerckhof, François Durvaux, Cédric Hocquet, David Bol, François-Xavier Standaert
Towards Green Cryptography: A Comparison of Lightweight Ciphers from the Energy Viewpoint. CHES (2012)
Alessandro Barenghi, Cédric Hocquet, David Bol, François-Xavier Standaert, Francesco Regazzoni, Israel Koren
Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-threshold Devices through an Example of a 65nm AES Implementation. RFIDSec (2011)
Cédric Hocquet, Dina Kamel, Francesco Regazzoni, Jean-Didier Legat, Denis Flandre, David Bol, François-Xavier Standaert
Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags. J. Cryptogr. Eng. 1 (1) (2011)
David Bol, Cédric Hocquet, Denis Flandre, Jean-Didier Legat
Robustness-aware sleep transistor engineering for power-gated nanometer subthreshold circuits. ISCAS (2010)
David Bol, Cédric Hocquet, Denis Flandre, Jean-Didier Legat
The detrimental impact of negative Celsius temperature on ultra-low-voltage CMOS logic. ESSCIRC (2010)
Dina Kamel, Cédric Hocquet, François-Xavier Standaert, Denis Flandre, David Bol
Glitch-induced within-die variations of dynamic energy in voltage-scaled nano-CMOS circuits. ESSCIRC (2010)