Robustness-aware sleep transistor engineering for power-gated nanometer subthreshold circuits.
David BolCédric HocquetDenis FlandreJean-Didier LegatPublished in: ISCAS (2010)
Keyphrases
- power dissipation
- floating gate
- power consumption
- high speed
- low power
- power reduction
- chip design
- cmos technology
- circuit design
- field effect transistors
- logic circuits
- battery powered
- power transmission
- engineering design
- artificial intelligence
- computer science
- low cost
- power saving
- mechanical engineering
- power management
- sleep apnea
- logic synthesis
- tunnel diode
- low voltage
- digital signal processing
- engineering education
- integrated circuit
- computational efficiency
- software engineering
- case study