B. K. S. V. L. Varaprasad

Publication Activity (10 Years)

Years Active: 2001-2023
Publications (10 Years): 3

Top Topics

Functional Units

Safety Critical

Top Venues

Microelectron. Reliab.

Publications

Raghunandana K. K, B. K. S. V. L. Varaprasad, Matteo Sonza Reorda, Virendra Singh
TREFU: An Online Error Detecting and Correcting Fault Tolerant GPGPU Architecture. IOLTS (2023)
Raghunandana K. K, B. K. S. V. L. Varaprasad, Matteo Sonza Reorda, Virendra Singh
REFU: Redundant Execution with Idle Functional Units, Fault Tolerant GPGPU architecture. ISVLSI (2022)
Faisal Mustafa Sajjade, Neeraj Kumar Goyal, B. K. S. V. L. Varaprasad, Ravindra Moogina
Radiation Hardened by Design Latches - A Review and SEU Fault Simulations. Microelectron. Reliab. 83 (2018)
B. K. S. V. L. Varaprasad, Lalit M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal
A New ATPG Technique (ExpoTan) for Testing Analog Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (1) (2007)
B. K. S. V. L. Varaprasad, Lalit M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal
A new ATPG technique (MultiDetect) for testing of analog macros in mixed-signal circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (2) (2004)
B. K. S. V. L. Varaprasad, L. M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal
An Efficient Test Pattern Generation Scheme for an On Chip BIST. VLSI Design 2001 (4) (2001)