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Raghunandana K. K
Publication Activity (10 Years)
Years Active: 2022-2024
Publications (10 Years): 4
Top Topics
Memory Hierarchy
Fault Tolerant
Functional Units
High Assurance
Top Venues
DFT
DDECS
IOLTS
ISVLSI
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Publications
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Raghunandana K. K
,
Yogesh Prasad K. R
,
Matteo Sonza Reorda
,
Virendra Singh
TCC: GPGPU Architecture for Instruction Decoder and Control Flow Error Detection.
DDECS
(2024)
Raghunandana K. K
,
Yogesh Prasad K. R
,
Matteo Sonza Reorda
,
Virendra Singh
DDSR: An Online GPGPU Instruction Decoder Error Detecting and Correcting Architecture.
DFT
(2023)
Raghunandana K. K
,
B. K. S. V. L. Varaprasad
,
Matteo Sonza Reorda
,
Virendra Singh
TREFU: An Online Error Detecting and Correcting Fault Tolerant GPGPU Architecture.
IOLTS
(2023)
Raghunandana K. K
,
B. K. S. V. L. Varaprasad
,
Matteo Sonza Reorda
,
Virendra Singh
REFU: Redundant Execution with Idle Functional Units, Fault Tolerant GPGPU architecture.
ISVLSI
(2022)