TCC: GPGPU Architecture for Instruction Decoder and Control Flow Error Detection.

Raghunandana K. K Yogesh Prasad K. R Matteo Sonza Reorda Virendra Singh

Published in: DDECS (2024)

Keyphrases

error detection
control flow
data flow
memory hierarchy
error correction
error resilient

error control
fault tolerance
software testing
fault isolation
process model

workflow management systems
computer architecture
main memory
business process models
multimedia

formal semantics
error resilience
error concealment
turbo codes
fault tolerant