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Alessandro Garghetti
ORCID
Publication Activity (10 Years)
Years Active: 2018-2022
Publications (10 Years): 7
Top Topics
Clock Gating
Figure Of Merit
Low Power
Cmos Technology
Top Venues
IEEE J. Solid State Circuits
ICECS
IEEE Trans. Circuits Syst. I Regul. Pap.
ISSCC
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Publications
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Alessandro Garghetti
,
Andrea L. Lacaita
,
David Seebacher
,
Matteo Bassi
,
Salvatore Levantino
Analysis and Design of 8-to-101.6-GHz Injection-Locked Frequency Divider by Five With Concurrent Dual-Path Multi-Injection Topology.
IEEE J. Solid State Circuits
57 (6) (2022)
Alessandro Garghetti
,
Andrea Leonardo Lacaita
,
David Seebacher
,
Matteo Bassi
,
Salvatore Levantino
A 13.6-69.1GHz 5.6mW Ring-Type Injection-Locked Frequency Divider by Five with >20% Continuous Locking Range and Operation up to 101.6GHz in 28nm CMOS.
CICC
(2021)
Alessandro Garghetti
,
Andrea L. Lacaita
,
Salvatore Levantino
A Novel Single-Inductor Injection-Locked Frequency Divider by Three With Dual-Injection Secondary Locking.
IEEE Trans. Circuits Syst. I Regul. Pap.
(5) (2019)
Luigi Grimaldi
,
Luca Bertulessi
,
Saleh Karman
,
Dmytro Cherniak
,
Alessandro Garghetti
,
Carlo Samori
,
Andrea L. Lacaita
,
Salvatore Levantino
A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fsrms Jitter in 65nm LP CMOS.
ISSCC
(2019)
Luca Bertulessi
,
Saleh Karman
,
Dmytro Cherniak
,
Alessandro Garghetti
,
Carlo Samori
,
Andrea L. Lacaita
,
Salvatore Levantino
A 30-GHz Digital Sub-Sampling Fractional- $N$ PLL With -238.6-dB Jitter-Power Figure of Merit in 65-nm LP CMOS.
IEEE J. Solid State Circuits
54 (12) (2019)
Alessandro Garghetti
,
Andrea L. Lacaita
,
Salvatore Levantino
A Low-Power and Wide-Locking-Range Injection-Locked Frequency Divider by Three with Dual-Injection Divide-by-Two Technique.
ISCAS
(2018)
Alessandro Garghetti
,
Andrea L. Lacaita
,
Salvatore Levantino
A Single-Inductor Two-Step-Mixing Injection-Locked Frequency Divider by Four with Concurrent Tail-Injection.
ICECS
(2018)