Alan P. Su

Publication Activity (10 Years)

Years Active: 2004-2018
Publications (10 Years): 2

Top Topics

Multicast Routing

Top Venues

IEEE Trans. Computers

Publications

Chun-Wei Wu, Kuen-Jong Lee, Alan P. Su
A Hybrid Multicast Routing Approach with Enhanced Methods for Mesh-Based Networks-on-Chip. IEEE Trans. Computers 67 (9) (2018)
Hsin-Pang Kuo, Alan P. Su, Kuen-Jong Lee
A low power synthesis flow for multi-rate systems. VLSI-DAT (2017)
Lih-Yih Chiou, Liang-Ying Lu, Bo-Chi Lin, Alan P. Su
Buffer size minimization method considering mix-clock domains and discontinuous data access. APCCAS (2012)
Kuen-Jong Lee, Alan P. Su, Long-Feng Chen, Jia-Wei Jhou, Jiff Kuo, Mark Liu
A software/hardware co-debug platform for multi-core systems. ASICON (2011)
Alan P. Su
Application of ESL synthesis on GSM edge algorithm for base station. ASP-DAC (2010)
W. M. Young, Chua-Huang Huang, Alan P. Su, Chewnpu Jou, Fu-Lung Hsueh
A practice of ESL verification methodology from SystemC to FPGA: using EPC class-1 generation-2 RFID tag design as an example. ASP-DAC (2010)
Chin-Yao Chang, Chih-Yuan Hsiao, Kuen-Jong Lee, Alan P. Su
Transaction Level Modeling and Design Space Exploration for SOC Test Architectures. Asian Test Symposium (2009)
Kuen-Jong Lee, Si-Yuan Liang, Alan P. Su
A low-cost SOC debug platform based on on-chip test architectures. SoCC (2009)
Ying-Cherng Lan, Michael C. Chen, Alan P. Su, Yu Hen Hu, Sao-Jie Chen
Flow Maximization for NoC Routing Algorithms. ISVLSI (2008)
Ying-Cherng Lan, Michael C. Chen, Alan P. Su, Yu Hen Hu, Sao-Jie Chen
Fluidity concept for NoC: A congestion avoidance and relief routing scheme. SoCC (2008)
Wei-Hsuan Hung, Yi-Jung Chen, Chia-Lin Yang, Yen-Sheng Chang, Alan P. Su
An architectural co-synthesis algorithm for energy-aware network-on-chip design. SAC (2007)
Alan P. Su, Robert Chen
Applying ESL in A Dual-Core SoC Platform Designing. SoCC (2006)
Li-Chuan Weng, Xiaojun Wang, Alan P. Su, Bin Liu
Low Power Heuristic Block-level Voltage/Frequency Scheduling. ESA/VLSI (2004)