A practice of ESL verification methodology from SystemC to FPGA: using EPC class-1 generation-2 RFID tag design as an example.
W. M. YoungChua-Huang HuangAlan P. SuChewnpu JouFu-Lung HsuehPublished in: ASP-DAC (2010)
Keyphrases
- rfid tags
- low cost
- low power consumption
- design methodology
- single chip
- high speed
- language learning
- real time
- radio frequency identification
- hardware design
- cost effective
- design process
- lightweight
- verilog hdl
- radio frequency identification rfid
- functional verification
- embedded systems
- low power
- model checking
- ambient intelligence
- supply chain