Login / Signup

Transaction Level Modeling and Design Space Exploration for SOC Test Architectures.

Chin-Yao ChangChih-Yuan HsiaoKuen-Jong LeeAlan P. Su
Published in: Asian Test Symposium (2009)
Keyphrases
  • design space exploration
  • hardware software partitioning
  • design space
  • real world
  • artificial intelligence
  • computer architecture
  • embedded systems