Clamping Virtual Supply Voltage of Power-Gated Circuits for Active Leakage Reduction and Gate-Oxide Reliability.
Abhishek A. SinkarTaejoon ParkNam Sung KimPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2013)
Keyphrases
- finite element analysis
- leakage current
- low voltage
- power reduction
- power management
- power consumption
- field effect transistors
- cmos technology
- chip design
- data leakage prevention
- power dissipation
- electrical properties
- virtual environment
- silicon dioxide
- augmented reality
- virtual world
- high speed
- power saving
- power line
- virtual reality
- low power
- reliability analysis
- active databases
- steady state
- electron microscopy
- design considerations
- multiple input
- high density
- delay insensitive
- fuel cell