On Probabilistic Testing of Large-Scale Sequential Circuits Using Circuit Decomposition.
Sunil R. DasWen-Ben JoneAmiya NayakIan ChoiPublished in: VLSI Design (1994)
Keyphrases
- logic synthesis
- high speed
- circuit design
- analog circuits
- tunnel diode
- delay insensitive
- analog vlsi
- electronic circuits
- digital circuits
- logic circuits
- power dissipation
- small scale
- vlsi circuits
- multi valued
- decomposition method
- generative model
- asynchronous circuits
- quantum computing
- power reduction
- data driven
- probabilistic model
- bayesian networks
- real life
- chip design
- cmos technology
- low power
- test cases
- test set
- decomposition methods
- decomposition algorithm
- data flow
- uncertain data
- steady state
- shift register