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Test configuration minimization for the logic cells of SRAM-based FPGAs: a case study.

Michel RenovellJean-Michel PortalJoan FiguerasYervant Zorian
Published in: ETW (1999)
Keyphrases
  • case study
  • power consumption
  • logic programming
  • test cases
  • test data
  • modal logic
  • random access memory
  • high speed
  • predicate logic
  • asynchronous circuits