A low-cost concurrent error detection technique for processor control logic.
Ramtilak VemuAbhijit JasJacob A. AbrahamSrinivas PatilRajesh GalivanchePublished in: DATE (2008)
Keyphrases
- error detection
- fault isolation
- low cost
- error correction
- error recovery
- fault tolerance
- error correcting
- data cleansing
- data acquisition
- low power
- single chip
- error resilient
- neural network
- fault tolerant
- real time
- control system
- parallel processing
- rfid tags
- logic programming
- logic programs
- high speed
- diagnostic tests