A parallel hardware architecture for Scale Invariant Feature Transform (SIFT).
Murad QasaimehAssim SagahyroonTamer ShanablehPublished in: ICMCS (2014)
Keyphrases
- scale invariant feature transform
- hardware architecture
- keypoints
- sift features
- object recognition
- image matching
- feature points
- sift descriptors
- hardware implementation
- feature matching
- feature detection
- image features
- bag of features
- depth images
- image descriptors
- speeded up robust features
- parallel processing
- feature descriptors
- associative memory
- massively parallel
- computer vision
- visual words
- parallel implementation
- image representation
- field programmable gate array
- image registration
- interest point detectors