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High Fault Coverage of In-Circuit IC Pin Faults with a Vectorless Test Technique Using Parasitic Transistors.
Jack Ferguson
Published in:
ITC (1996)
Keyphrases
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integrated circuit
built in self test
circuit design
test cases
wide range
high speed
data sets
flip flops
cmos technology
fault detection
fault diagnosis
real time
low power
test data
model based diagnosis
software systems
artificial neural networks
multiple faults
expert systems