Low-Cost Scan-Based Delay Testing of Latch-Based Circuits with Time Borrowing.
Kun Young ChungSandeep K. GuptaPublished in: VTS (2006)
Keyphrases
- low cost
- low power
- power dissipation
- logic circuits
- power reduction
- power consumption
- high speed
- cmos technology
- flip flops
- single chip
- vlsi circuits
- data acquisition
- real time
- hardware and software
- test cases
- tunnel diode
- logic synthesis
- delay insensitive
- highly efficient
- digital signal processing
- rfid tags
- chip design
- digital circuits
- software testing
- high density
- digital camera
- test data
- image processing
- data sets