High-Voltage Stress Test Paradigms of Analog CMOS ICs for Gate-Oxide Reliability Enhancement.
Mohammad Athar KhalilChin-Long WeyPublished in: VTS (2001)
Keyphrases
- high voltage
- gate dielectrics
- analog vlsi
- si sio
- electrical properties
- circuit design
- cmos image sensor
- operating conditions
- image enhancement
- field effect transistors
- floating gate
- power consumption
- cmos technology
- silicon dioxide
- high speed
- low cost
- genetic algorithm
- mixed signal
- normal operation
- neural network
- focal plane
- low power
- markov chain
- leakage current
- learning algorithm