A selective error data capture method using on-chip DRAM for silicon debug of multi-core design.

Hyunggoy Oh Heetae Kim Jaeil Lim Sungho Kang

Published in: ISOCC (2017)

Keyphrases

hypothesis tests
high speed
data analysis
data sets
prior knowledge
query processing
low cost
design process
synthetic data
test data
statistical methods
high density
functional verification