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Investigation on the Gate Bias Voltage of BigFET in Power-rail ESD Clamp Circuit for Enhanced Transient Noise Immunity.
Guangyi Lu
Yuan Wang
Lizhong Zhang
Yize Wang
Ru Huang
Xing Zhang
Published in:
ISCAS (2018)
Keyphrases
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noise immunity
duty cycle
field effect transistors
steady state
single phase
cmos technology
high speed
low voltage
short circuit
power consumption
power dissipation
power losses
power quality
low power
silicon dioxide
high density
rotation invariance
power supply
power system
retrieval accuracy