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Design of Routing-Constrained Low Power Scan Chains.
Yannick Bonhomme
Patrick Girard
Loïs Guiller
Christian Landrault
Serge Pravossoudovitch
Arnaud Virazel
Published in:
DELTA (2004)
Keyphrases
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low power
power consumption
single chip
high speed
low power consumption
vlsi architecture
low cost
logic circuits
gate array
digital signal processing
vlsi circuits
cmos technology
power dissipation
ultra low power
design methodology
power reduction
wireless networks