Design of Routing-Constrained Low Power Scan Chains.

Yannick Bonhomme Patrick Girard Loïs Guiller Christian Landrault Serge Pravossoudovitch Arnaud Virazel

Published in: DATE (2004)

Keyphrases

low power
single chip
low power consumption
power consumption
vlsi architecture
low cost
high speed
digital signal processing
power dissipation
logic circuits
cmos technology
gate array
high power
mixed signal
signal processor
ultra low power
design methodology
energy efficiency
vlsi circuits
routing protocol