A 1-to-4b 16.8-POPS/W 473-TOPS/mm2 6T-based In-Memory Computing SRAM in 22nm FD-SOI with Multi-Bit Analog Batch-Normalization.
Adrian KneipMartin LefebvreJulien VereckenDavid BolPublished in: ESSCIRC (2022)
Keyphrases
- random access memory
- dynamic random access memory
- design considerations
- embedded dram
- silicon on insulator
- low voltage
- analog to digital converter
- nm technology
- power consumption
- preprocessing
- rms error
- cmos technology
- hash table
- memory space
- data structure
- mixed signal
- memory subsystem
- leakage current
- low power
- main memory