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Defect analysis in power mode control logic of low-power SRAMs.

Leonardo Bonet ZordanAlberto BosioLuigi DililloPatrick GirardAida TodriArnaud VirazelNabil Badereddine
Published in: ETS (2012)
Keyphrases
  • low power
  • power consumption
  • high power
  • high speed
  • low cost
  • real time
  • low complexity
  • single chip
  • power dissipation
  • vlsi architecture
  • delay insensitive
  • vlsi circuits