Predicting the Performance of a 3D Processor-Memory Chip Stack.
Philip JacobOkan ErdoganAamir ZiaPaul M. BelemjianRussell P. KraftJohn F. McDonaldPublished in: IEEE Des. Test Comput. (2005)
Keyphrases
- processor core
- memory subsystem
- random access memory
- memory access
- single chip
- level parallelism
- high speed
- multithreading
- memory management
- ibm zenterprise
- memory bandwidth
- operating system
- ibm power processor
- functional verification
- chip design
- intel xeon
- dynamic random access memory
- instruction set
- low power
- embedded dram
- main memory
- digital signal processors
- data access
- low cost
- input output
- random access
- gigabit ethernet
- memory requirements
- shared memory multiprocessors
- multi core processors
- high density
- computational power
- memory space
- processing elements
- memory hierarchy