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An On-Chip Error Detection Method to Reduce the Post-Silicon Debug Time.

Hyunggoy OhTaewoo HanInhyuk ChoiSungho Kang
Published in: IEEE Trans. Computers (2017)
Keyphrases
  • detection method
  • high density
  • high speed
  • low cost
  • detection algorithm
  • face detection
  • feature detection
  • cmos technology
  • error rate
  • low power
  • training data
  • saliency detection