A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and Accumulate Operation by Employing Charge Sharing.
Dinesh KushwahaAditya SharmaNeha GuptaRitik RajAshish JoshiJwalant MishraRajat KohliSandeep MiryalaRajiv V. JoshiSudeb DasguptaAnand BulusuPublished in: ISCAS (2022)
Keyphrases
- random access memory
- clock gating
- embedded dram
- charge coupled devices
- power consumption
- design considerations
- low voltage
- dynamic random access memory
- data sharing
- nm technology
- memory access
- information sharing
- main memory
- memory usage
- wireless sensor networks
- logical operations
- memory size
- floating point
- cmos technology
- power dissipation
- multiple users
- memory requirements
- neural network