A New Testing Acceleration Chip for Low-Cost Memory Tests.
Michihiro InoueToshio YamadaAtsushi FujiwaraPublished in: IEEE Des. Test Comput. (1993)
Keyphrases
- low cost
- test cases
- test generation
- low power
- hardware and software
- test suite
- real time
- test data
- single chip
- statistical tests
- low power consumption
- digital camera
- data acquisition
- memory requirements
- highly efficient
- limited memory
- computing power
- computational power
- test set
- main memory
- physical design
- power dissipation
- memory size
- high speed
- level parallelism
- code coverage