Atsushi Fujiwara

Publication Activity (10 Years)

Years Active: 1993-2020
Publications (10 Years): 1

Top Topics

Magnetic Recording

Network Analysis

Centrality Measures

Top Venues

Publications

Yuri Kato, Yoshihisa Matoba, Katsumi Honda, Koji Ogawa, Kan Shimizu, Masataka Maehara, Atsushi Fujiwara, Aoi Odawara, Chigusa Yamane, Naohiko Kimizuka, Jun Ogi, Tadayuki Taura, Ikuro Suzuki, Yusuke Oike
High-Density and Large-Scale MEA System Featuring 236, 880 Electrodes at 11.72μm Pitch for Neuronal Network Analysis. VLSI Circuits (2020)
Bahareh Sadeghi, Akira Yamada, Atsushi Fujiwara, L. Lily Yang
A simple and efficient hop-by-hop congestion control protocol for wireless mesh networks. WICON (2006)
Akira Yamada, Atsushi Fujiwara, L. Lily Yang, Bahareh Sadeghi
EDCA Based Congestion Control for WLAN Mesh Networks. VTC Spring (2006)
Atsushi Fujiwara, Shinji Takeda, Hitoshi Yoshino, Narumi Umeda
Evaluation of Cell Coverage and System Throughput in Multihop DS-CDMA Cellular Network. IEICE Trans. Commun. (9) (2005)
Atsushi Fujiwara, Yoichi Matsumoto
Centralized Channel Allocation Technique to Alleviate Exposed Terminal Problem in CSMA/CA-Based Mesh Networks - Solution Employing Chromatic Graph Approach - . IEICE Trans. Commun. (3) (2005)
Mitsuru Hiraki, Takayasu Ito, Atsushi Fujiwara, Taichi Ohashi, Tetsuro Hamano, Takaaki Noda
A 63-μW standby power microcontroller with on-chip hybrid regulator scheme. IEEE J. Solid State Circuits 37 (5) (2002)
Yasushi Yamao, Toru Otsu, Atsushi Fujiwara, Hidekazu Murata, Susumu Yoshida
Multi-hop radio access cellular concept for fourth-generation mobile communications system. PIMRC (2002)
Toshiham Matsukuma, Atsushi Fujiwara, Munehiro Namba, Yoshihisa Ishida
Non-linear PID controller using neural networks. ICNN (1997)
Michihiro Inoue, Toshio Yamada, Atsushi Fujiwara
A New Testing Acceleration Chip for Low-Cost Memory Tests. IEEE Des. Test Comput. 10 (1) (1993)