Fault Simulation and Test Pattern Generation for Cross-gate Defects in FinFET Circuits.
Kuan-Ying ChiangYu-Hao HoYo-Wei ChenCheng-Sheng PanJames Chien-Mo LiPublished in: ATS (2015)
Keyphrases
- fault diagnosis
- high speed
- fault models
- defect detection
- simulation model
- artificial intelligence
- cmos technology
- simulation environment
- closed loop
- database
- fault detection
- mathematical analysis
- simulation models
- circuit design
- digital circuits
- artificial neural networks
- analog circuits
- logic circuits
- logic synthesis