On-chip lightweight implementation of reduced NIST randomness test suite.
Vikram B. SureshDaniele AntonioliWayne P. BurlesonPublished in: HOST (2013)
Keyphrases
- lightweight
- test suite
- test cases
- regression testing
- low cost
- high speed
- vlsi implementation
- wireless sensor networks
- dos attacks
- test suite reduction
- databases
- national institute of standards and technology
- mutation testing
- communication infrastructure
- cmos technology
- software testing
- efficient implementation
- software engineering
- machine learning