Login / Signup
Test Sets for Robust Path Delay Fault Testing on Two-Rail Logic Circuits.
Kazuteru Namba
Hideo Ito
Published in:
IEEE Trans. Computers (2011)
Keyphrases
</>
test set
logic circuits
test cases
test data
error rate
training set
fault detection
fault diagnosis
low power
training data
high speed
power dissipation
face recognition
image restoration
gate array