Full chip power benefits with negative capacitance FETs.
Sandeep Kumar SamalSourabh KhandelwalAsif I. KhanSayeef S. SalahuddinChenming HuSung Kyu LimPublished in: ISLPED (2017)
Keyphrases
- high speed
- power dissipation
- power consumption
- low power
- ibm power processor
- low cost
- positive and negative
- chip design
- single chip
- power management
- cmos technology
- high density
- physical design
- power reduction
- ultra low power
- real time
- functional verification
- vlsi implementation
- multithreading
- digital signal processing
- image sensor