Enhanced Delay Test Generator for High-Speed Logic LSIs.

Kazumi Hatayama Mitsuji Ikeda Terumine Hayashi Masahiro Takakura Kuniaki Kishida Shun Ishiyama

Published in: ITC (1989)

Keyphrases

high speed
low power
data generator
logic programming
real time
test data
classical logic
computational properties
database
web services
low cost
artificial intelligence
machine learning
test cases
end to end
modal logic
frame rate
neural network
test suite
high speed networks