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Yulhwa Kim
ORCID
Publication Activity (10 Years)
Years Active: 2018-2024
Publications (10 Years): 22
Top Topics
Neural Network
Diffusion Models
Floating Point
Embedded Dram
Top Venues
CoRR
ISLPED
DATE
A-SSCC
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Publications
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Hyesung Jeon
,
Yulhwa Kim
,
Jae-Joon Kim
L4Q: Parameter Efficient Quantization-Aware Training on Large Language Models via LoRA-wise LSQ.
CoRR
(2024)
Jiwon Song
,
Kyungseok Oh
,
Taesu Kim
,
Hyungjun Kim
,
Yulhwa Kim
,
Jae-Joon Kim
SLEB: Streamlining LLMs through Redundancy Verification and Elimination of Transformer Blocks.
CoRR
(2024)
Yulhwa Kim
,
Jaeyong Jang
,
Jehun Lee
,
Jihoon Park
,
Jeonghoon Kim
,
Byeongwook Kim
,
Baeseong Park
,
Se Jung Kwon
,
Dongsoo Lee
,
Jae-Joon Kim
Winning Both the Accuracy of Floating Point Activation and the Simplicity of Integer Arithmetic.
ICLR
(2023)
Yulhwa Kim
,
Dongwon Jo
,
Hyesung Jeon
,
Taesu Kim
,
Daehyun Ahn
,
Hyungjun Kim
,
Jae-Joon kim
Leveraging Early-Stage Robustness in Diffusion Models for Efficient and High-Quality Image Synthesis.
NeurIPS
(2023)
Jiwoong Choi
,
Minkyu Kim
,
Daehyun Ahn
,
Taesu Kim
,
Yulhwa Kim
,
Dongwon Jo
,
Hyesung Jeon
,
Jae-Joon Kim
,
Hyungjun Kim
Squeezing Large-Scale Diffusion Models for Mobile.
CoRR
(2023)
Yulhwa Kim
,
Hyungjun Kim
,
Jae-Joon Kim
Extreme Partial-Sum Quantization for Analog Computing-In-Memory Neural Network Accelerators.
ACM J. Emerg. Technol. Comput. Syst.
18 (4) (2022)
Sungju Ryu
,
Hyungjun Kim
,
Wooseok Yi
,
Eunhwan Kim
,
Yulhwa Kim
,
Taesu Kim
,
Jae-Joon Kim
BitBlade: Energy-Efficient Variable Bit-Precision Hardware Accelerator for Quantized Neural Networks.
IEEE J. Solid State Circuits
57 (6) (2022)
Hyunmyung Oh
,
Hyungjun Kim
,
Daehyun Ahn
,
Jihoon Park
,
Yulhwa Kim
,
Inhwan Lee
,
Jae-Joon Kim
Energy-efficient charge sharing-based 8T2C SRAM in-memory accelerator for binary neural networks in 28nm CMOS.
A-SSCC
(2021)
Hyunmyung Oh
,
Hyungjun Kim
,
Nameun Kang
,
Yulhwa Kim
,
Jihoon Park
,
Jae-Joon Kim
Single RRAM Cell-based In-Memory Accelerator Architecture for Binary Neural Networks.
AICAS
(2021)
Yulhwa Kim
,
Hyungjun Kim
,
Jihoon Park
,
Hyunmyung Oh
,
Jae-Joon Kim
Mapping Binary ResNets on Computing-In-Memory Hardware with Low-bit ADCs.
DATE
(2021)
Daehyun Ahn
,
Hyunmyung Oh
,
Hyungjun Kim
,
Yulhwa Kim
,
Jae-Joon Kim
Maximizing Parallel Activation of Word-Lines in MRAM-Based Binary Neural Network Accelerators.
IEEE Access
9 (2021)
Naebeom Park
,
Yulhwa Kim
,
Daehyun Ahn
,
Taesu Kim
,
Jae-Joon Kim
Time-step interleaved weight reuse for LSTM neural network computing.
ISLPED
(2020)
Sungju Ryu
,
Hyungjun Kim
,
Wooseok Yi
,
Jongeun Koo
,
Eunhwan Kim
,
Yulhwa Kim
,
Taesu Kim
,
Jae-Joon Kim
A 44.1TOPS/W Precision-Scalable Accelerator for Quantized Neural Networks in 28nm CMOS.
CICC
(2020)
Hyungjun Kim
,
Yulhwa Kim
,
Sungju Ryu
,
Jae-Joon Kim
Algorithm/Hardware Co-Design for In-Memory Neural Network Computing with Minimal Peripheral Circuit Overhead.
DAC
(2020)
Shihui Yin
,
Jae-sun Seo
,
Yulhwa Kim
,
Xu Han
,
Hugh J. Barnaby
,
Shimeng Yu
,
Yandong Luo
,
Wangxin He
,
Xiaoyu Sun
,
Jae-Joon Kim
Monolithically Integrated RRAM- and CMOS-Based In-Memory Computing Optimizations for Efficient Deep Learning.
IEEE Micro
39 (6) (2019)
Hyungjun Kim
,
Yulhwa Kim
,
Sungju Ryu
,
Jae-Joon Kim
BitSplit-Net: Multi-bit Deep Neural Network with Bitwise Activation Function.
CoRR
(2019)
Wooseok Yi
,
Yulhwa Kim
,
Jae-Joon Kim
Effect of Device Variation on Mapping Binary Neural Network to Memristor Crossbar Array.
DATE
(2019)
Jinseok Kim
,
Jongeun Koo
,
Taesu Kim
,
Yulhwa Kim
,
Hyungjun Kim
,
Seunghyun Yoo
,
Jae-Joon Kim
Area-Efficient and Variation-Tolerant In-Memory BNN Computing using 6T SRAM Array.
VLSI Circuits
(2019)
Hyungjun Kim
,
Yulhwa Kim
,
Jae-Joon Kim
In-memory batch-normalization for resistive memory based binary neural network hardware.
ASP-DAC
(2019)
Yulhwa Kim
,
Hyungjun Kim
,
Daehyun Ahn
,
Jae-Joon Kim
Input-Splitting of Large Neural Networks for Power-Efficient Accelerator with Resistive Crossbar Memory Array.
ISLPED
(2018)
Yulhwa Kim
,
Hyungjun Kim
,
Jae-Joon Kim
Neural Network-Hardware Co-design for Scalable RRAM-based BNN Accelerators.
CoRR
(2018)
Jinseok Kim
,
Yulhwa Kim
,
Sungho Kim
,
Jae-Joon Kim
Compact Convolution Mapping on Neuromorphic Hardware using Axonal Delay.
ISLPED
(2018)