Energy-efficient charge sharing-based 8T2C SRAM in-memory accelerator for binary neural networks in 28nm CMOS.
Hyunmyung OhHyungjun KimDaehyun AhnJihoon ParkYulhwa KimInhwan LeeJae-Joon KimPublished in: A-SSCC (2021)
Keyphrases
- energy efficient
- random access memory
- power consumption
- energy efficiency
- neural network
- nm technology
- cmos technology
- wireless sensor networks
- low power
- power dissipation
- data transmission
- embedded dram
- energy consumption
- low voltage
- sensor networks
- dynamic random access memory
- data dissemination
- associative memory
- base station
- power management
- multi core architecture
- routing protocol
- high speed
- silicon on insulator
- low cost
- parallel implementation
- data acquisition
- metal oxide semiconductor
- field programmable gate array
- flash memory
- memory access
- sensor nodes