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Area-Efficient and Variation-Tolerant In-Memory BNN Computing using 6T SRAM Array.
Jinseok Kim
Jongeun Koo
Taesu Kim
Yulhwa Kim
Hyungjun Kim
Seunghyun Yoo
Jae-Joon Kim
Published in:
VLSI Circuits (2019)
Keyphrases
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random access memory
memory space
real time
data sets
databases
computationally efficient
database
database systems
computational complexity
computationally expensive
low power
highly efficient
efficient computation
limited memory