Yuko Hara

Publication Activity (10 Years)

Years Active: 2006-2014
Publications (10 Years): 0

Top Topics

Visual Attention

Parameter Values

Information Retrieval

Neural Network Model

Top Venues

Frontiers Comput. Neurosci.

Publications

Yuko Hara, Franco Pestilli, Justin L. Gardner
Differing effects of attention in single-units and populations are well predicted by heterogeneous tuning and the normalization model of attention. Frontiers Comput. Neurosci. 8 (2014)
Yuko Hara, Hiroyuki Tomiyama
Clock-constrained simultaneous allocation and binding for multiplexer optimization in high-level synthesis. ASP-DAC (2012)
Yoshitaka Ushiku, Hiroshi Muraoka, Sho Inaba, Teppei Fujisawa, Koki Yasumoto, Naoyuki Gunji, Takayuki Higuchi, Yuko Hara, Tatsuya Harada, Yasuo Kuniyoshi
ISI at ImageCLEF 2012: Scalable System for Image Annotation. CLEF (Online Working Notes/Labs/Workshop) (2012)
Toshinobu Matsuba, Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis. DELTA (2010)
Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Partitioning of Behavioral Descriptions with Exploiting Function-Level Parallelism. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2010)
Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis. J. Inf. Process. 17 (2009)
Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada
Embedded System Covalidation with RTOS Model and FPGA. IPSJ Trans. Syst. LSI Des. Methodol. 1 (2008)
Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii
CHStone: A benchmark program suite for practical C-based high-level synthesis. ISCAS (2008)
Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada
Embedded System Covalidation with RTOS Model and FPGA. Inf. Media Technol. 3 (4) (2008)
Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii
Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2007)
Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Function Call Optimization for Efficient Behavioral Synthesis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (9) (2007)
Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii
Behavioral Synthesis of Double-Precision Floating-Point Adders with Function-Level Transformations: A Case Study. ICESS (2007)
Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii
Complexity-constrainted partitioning of sequential programs for efficient behavioral synthesis. ACM Great Lakes Symposium on VLSI (2007)
Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Function Call Optimization in Behavioral Synthesis. DSD (2006)