Toshinobu Matsuba

Publication Activity (10 Years)

Years Active: 2010-2014
Publications (10 Years): 0

Top Topics

Network Externalities

Resource Sharing

Distributed Computing

Top Venues

Inf. Media Technol.

IPSJ Trans. Syst. LSI Des. Methodol.

Publications

Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Impact of Resource Sharing and Register Retiming on Area and Performance of FPGA-based Designs. IPSJ Trans. Syst. LSI Des. Methodol. 7 (2014)
Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Impact of Resource Sharing and Register Retiming on Area and Performance of FPGA-based Designs. Inf. Media Technol. 9 (1) (2014)
Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Quantitative Evaluation of Resource Sharing in High-level Synthesis Using Realistic Benchmarks. IPSJ Trans. Syst. LSI Des. Methodol. 6 (2013)
Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Quantitative Evaluation of Resource Sharing in High-level Synthesis Using Realistic Benchmarks. Inf. Media Technol. 8 (4) (2013)
Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Selective Resource Sharing with RT-Level Retiming for Clock Enhancement in High-Level Synthesis. HPCC-ICESS (2012)
Toshinobu Matsuba, Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis. DELTA (2010)