Yuan-Ho Chen

Publication Activity (10 Years)

Years Active: 2006-2024
Publications (10 Years): 23

Top Topics

Wavelet Decomposition

Vlsi Implementation

Top Venues

Int. J. Circuit Theory Appl.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Yuan-Ho Chen, Szi-Wen Chen, Hong-Wen Jian, Shinn-Yn Lin, Rou-Shayn Chen
A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN). IEEE Access 12 (2024)
Yun-Ting Zhang, Chin-Fu Nien, Chia-Wei Lin, Wen-Jui Chao, Chen-Yu Liu, Lien-Po Yu, Yuan-Ho Chen
An Automated Toolchain for QUBO-based Optimization with Quantum-inspired Annealers. ISOCC (2023)
Song-Nien Tang, Yuan-Ho Chen, Yu-Wei Chang, Yu-Ting Chen, Shuo-Hung Chou
Hybrid CNN-LSTM Network for ECG Classification and Its Software-Hardware Co-Design Approach. ISOCC (2023)
Yuan-Ho Chen, Szi-Wen Chen, Pei-Jung Chang, Hsin-Tung Hua, Shinn-Yn Lin, Rou-Shayn Chen
A VLSI Chip for the Abnormal Heart Beat Detection Using Convolutional Neural Network. Sensors 22 (3) (2022)
Yuan-Ho Chen, Chih-Wen Lu, Szi-Wen Chen, Ming-Han Tsai, Shinn-Yn Lin, Rou-Shayn Chen
VLSI Implementation of QRS Complex Detector Based on Wavelet Decomposition. IEEE Access 10 (2022)
Yuan-Ho Chen, Hsin-Tung Hua
Very Large-Scale Integration for Premature Ventricular Contraction Detection Using a Convolutional Neural Network. J. Circuits Syst. Comput. 31 (5) (2022)
Yi-Fan Chen, Wei-Jhong Huang, Yi-Wei Zeng, Hsin-Tung Hua, Kai-Fen Chang, Yuan-Ho Chen
Very-large-scale Integration of a Dual-lead Electrocardiogram Compression Chip with Modified Huffman Encoding. LifeTech (2022)
Kai-Fen Chang, Yuan-Ho Chen
High Accuracy Abnormal ECG Detection Chip Using a Simple Neural Network. ISOCC (2022)
Chung-Yi Li, Yuan-Ho Chen, Lu-An Lai, Wen-Chi Ye, Jun Yang
Simple and hardware-efficient row-based direct-mapping estimators in fixed-width modified Booth multipliers. Int. J. Circuit Theory Appl. 49 (4) (2021)
Yuan-Ho Chen
Improvement of Accuracy of Fixed-Width Booth Multipliers Using Data Scaling Technology. IEEE Trans. Circuits Syst. II Express Briefs 68 (3) (2021)
Yuan-Ho Chen, Yun-Hua Tseng, Pao-Hsien Chu, Yen Juan, Shun-Ping Wang
VLSI Implementation of a Cost-Efficient 3-Lead Lossless ECG Compressor and Decompressor. Circuits Syst. Signal Process. 39 (3) (2020)
Yuan-Ho Chen, Chieh-Yang Liu
A low-area high-efficiency video coding inverse transform core using resource and time sharing architecture. EURASIP J. Adv. Signal Process. 2020 (1) (2020)
Yuan-Ho Chen, Shun-Ping Wang
Low-Cost Implementation of Independent Component Analysis for Biomedical Signal Separation Using Very-Large-Scale Integration. IEEE Trans. Circuits Syst. (12) (2020)
Yuan-Ho Chen, Szi-Wen Chen, Min-Xian Wei
A VLSI Implementation of Independent Component Analysis for Biomedical Signal Separation Using CORDIC Engine. IEEE Trans. Biomed. Circuits Syst. 14 (2) (2020)
Yu-Lun Huang, Pei-Jung Chang, Yuan-Ho Chen
Premature Ventricular Complex Detection Chip Obtained Using Convolution Neural Network. ICAIIC (2020)
Yun-Hua Tseng, Yuan-Ho Chen
Cost-effective multi-standard video transform core using time-sharing architecture. EURASIP J. Adv. Signal Process. 2019 (2019)
Yuan-Ho Chen
Run-time calibration scheme for the implementation of a robust field-programmable gate array-based time-to-digital converter. Int. J. Circuit Theory Appl. 47 (1) (2019)
Yun-Hua Tseng, Yuan-Ho Chen, Chih-Wen Lu
Multiple Leads With a Switch Mode for Lossless and Lossy Compression Using Very-Large-Scale Integration Technology. IEEE Access 6 (2018)
Yuan-Ho Chen, Chung-Yi Li, Luhua Lai
Fine-Tuning Accuracy Using Conditional Probability of the Bottom Sign-Bit in Fixed-Width Modified Booth Multiplier. Circuits Syst. Signal Process. 37 (7) (2018)
Yuan-Ho Chen, Yi-Fan Ko
High-throughput IDCT architecture for high-efficiency video coding (HEVC). Int. J. Circuit Theory Appl. 45 (12) (2017)
Yun-Hua Tseng, Yuan-Ho Chen, Chih-Wen Lu
Adaptive Integration of the Compressed Algorithm of CS and NPC for the ECG Signal Compressed Algorithm in VLSI Implementation. Sensors 17 (10) (2017)
Yun-Hua Tseng, Yuan-Ho Chen, Tze-Yang Kao, Chih-Wen Lu
Low-cost multi-standard simultaneous forward and inverse video transform core. Int. J. Circuit Theory Appl. 44 (8) (2016)
Wen-Quan He, Yuan-Ho Chen, Shyh-Jye Jou
Dynamic Error-Compensated Fixed-Width Booth Multiplier Based on Conditional-Probability of Input Series. Circuits Syst. Signal Process. 35 (8) (2016)
Szi-Wen Chen, Yuan-Ho Chen
Hardware Design and Implementation of a Wavelet De-Noising Procedure for Medical Signal Preprocessing. Sensors 15 (10) (2015)
Yuan-Ho Chen
An Accuracy-Adjustment Fixed-Width Booth Multiplier Based on Multilevel Conditional Probability. IEEE Trans. Very Large Scale Integr. Syst. 23 (1) (2015)
Yuan-Ho Chen
Area-Efficient Fixed-Width Squarer With Dynamic Error-Compensation Circuit. IEEE Trans. Circuits Syst. II Express Briefs (9) (2015)
Wen-Quan He, Yuan-Ho Chen, Shyh-Jye Jou
High-Accuracy Fixed-Width Booth Multipliers Based on Probability and Simulation. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2015)
Yuan-Ho Chen, Chih-Wen Lu, Shian-Shing Shyu, Chung-Lin Lee, Ting-Chia Ou
A Multi-stage Fault-Tolerant Multiplier with Triple Module Redundancy (TMR) Technique. J. Circuits Syst. Comput. 23 (5) (2014)
Yuan-Ho Chen, Hsiao-Tzu Liu
Hardware-Efficient Multi-Standard Video Transform Core. J. Circuits Syst. Comput. 23 (8) (2014)
Yuan-Ho Chen, Jyun-Neng Chen, Tsin-Yuan Chang, Chih-Wen Lu
High-Throughput Multistandard Transform Core Supporting MPEG/H.264/VC-1 Using Common Sharing Distributed Arithmetic. IEEE Trans. Very Large Scale Integr. Syst. 22 (3) (2014)
Yuan-Ho Chen, Ruei-Yuan Jou, Tsin-Yuan Chang, Chih-Wen Lu
A High-Throughput and Area-Efficient Video Transform Core With a Time Division Strategy. IEEE Trans. Very Large Scale Integr. Syst. 22 (11) (2014)
Kai-Tang Fan, Yuan-Ho Chen, Ching-Wen Wang, Minder Chen
E-leadership effectiveness in virtual teams: motivating language perspective. Ind. Manag. Data Syst. 114 (3) (2014)
Yuan-Ho Chen
A high resolution FPGA-based merged delay line TDC with nonlinearity calibration. ISCAS (2013)
Ming-Lang Tseng, Yuan-Ho Chen, Yong Geng
Integrated model of hot spring service quality perceptions under uncertainty. Appl. Soft Comput. 12 (8) (2012)
Chung-Yi Li, Yuan-Ho Chen, Tsin-Yuan Chang, Lih-Yuan Deng, Kiwing To
Period Extension and Randomness Enhancement Using High-Throughput Reseeding-Mixing PRNG. IEEE Trans. Very Large Scale Integr. Syst. 20 (2) (2012)
Yuan-Ho Chen, Tsin-Yuan Chang
A High-Accuracy Adaptive Conditional-Probability Estimator for Fixed-Width Booth Multipliers. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2012)
Yuan-Ho Chen, Tsin-Yuan Chang
A High Performance Video Transform Engine by Using Space-Time Scheduling Strategy. IEEE Trans. Very Large Scale Integr. Syst. 20 (4) (2012)
Yuan-Ho Chen, Chung-Yi Li, Tsin-Yuan Chang
Area-Effective and Power-Efficient Fixed-Width Booth Multipliers Using Generalized Probabilistic Estimation Bias. IEEE J. Emerg. Sel. Topics Circuits Syst. 1 (3) (2011)
Yuan-Ho Chen, Tsin-Yuan Chang, Chung-Yi Li
High Throughput DA-Based DCT With High Accuracy Error-Compensated Adder Tree. IEEE Trans. Very Large Scale Integr. Syst. 19 (4) (2011)
Chung-Yi Li, Yuan-Ho Chen, Tsin-Yuan Chang, Jyun-Neng Chen
A Probabilistic Estimation Bias Circuit for Fixed-Width Booth Multiplier and Its DCT Applications. IEEE Trans. Circuits Syst. II Express Briefs (4) (2011)
Chiou-Yng Lee, Chin-Chin Chen, Yuan-Ho Chen, Erl-Huei Lu
Low-Complexity Bit-Parallel Systolic Multipliers over GF(2m). SMC (2006)
Bor-Sen Chen, Bore-Kuen Lee, Yuan-Ho Chen
optimal predictor. IEEE Trans. Wirel. Commun. 5 (10) (2006)
Bore-Kuen Lee, Yuan-Ho Chen, Bor-Sen Chen
Robust$H_infty$Power Control for CDMA Cellular Communication Systems. IEEE Trans. Signal Process. 54 (10) (2006)