Run-time calibration scheme for the implementation of a robust field-programmable gate array-based time-to-digital converter.
Yuan-Ho ChenPublished in: Int. J. Circuit Theory Appl. (2019)
Keyphrases
- field programmable gate array
- hardware implementation
- fpga technology
- hardware architecture
- software implementation
- data conversion
- fpga device
- digital signal processors
- hardware software co design
- embedded systems
- xilinx virtex
- hardware description language
- parallel architecture
- reconfigurable hardware
- image processing algorithms
- programmable logic
- general purpose processors
- hardware and software
- efficient implementation
- signal processing
- low cost
- object oriented
- image processing