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Yong Chang Kim
Publication Activity (10 Years)
Years Active: 1998-2005
Publications (10 Years): 0
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Publications
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Yong Chang Kim
,
Vishwani D. Agrawal
,
Kewal K. Saluja
Combinational automatic test pattern generation for acyclic sequential circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
24 (6) (2005)
Vishwani D. Agrawal
,
Dong Hyun Baik
,
Yong Chang Kim
,
Kewal K. Saluja
Exclusive Test and its Applications to Fault Diagnosis.
VLSI Design
(2003)
Yong Chang Kim
,
Vishwani D. Agrawal
,
Kewal K. Saluja
Multiple Faults: Modeling, Simulation and Test.
VLSI Design
(2002)
Yong Chang Kim
,
Kewal K. Saluja
,
Vishwani D. Agrawal
Combinational Test Generation for Acyclic SequentialCircuits using a Balanced ATPG Model.
VLSI Design
(2001)
Yong Chang Kim
,
Vishwani D. Agrawal
,
Kewal K. Saluja
Combinational test generation for various classes of acyclic sequential circuits.
ITC
(2001)
Yong Chang Kim
,
Kewal K. Saluja
,
Vishwani D. Agrawal
A Correlation Matrix Method of Clock Partitioning for Sequential Circuit Testability.
Great Lakes Symposium on VLSI
(1999)
Yong Chang Kim
,
Kewal K. Saluja
Sequential test generators: past, present and future.
Integr.
26 (1-2) (1998)