Login / Signup
Yaoyu Tao
ORCID
Publication Activity (10 Years)
Years Active: 2012-2024
Publications (10 Years): 21
Top Topics
Decoding Algorithm
Memory Access
Floating Point
Polar Coordinates
Top Venues
CoRR
ISCAS
IEEE J. Solid State Circuits
MICRO
</>
Publications
</>
Wei Tang
,
Sung-Gun Cho
,
Tim Tri Hoang
,
Jacob Botimer
,
Wei Qiang Zhu
,
Ching-Chi Chang
,
Cheng-Hsun Lu
,
Junkang Zhu
,
Yaoyu Tao
,
Tianyu Wei
,
Naomi Kavi Motwani
,
Mani Yalamanchi
,
Ramya Yarlagadda
,
Sirisha Rani Kale
,
Mark Flanigan
,
Allen Chan
,
Thungoc Tran
,
Sergey Y. Shumarayev
,
Zhengya Zhang
Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.
IEEE J. Solid State Circuits
59 (4) (2024)
Wei Tang
,
Sung-Gun Cho
,
Tim Tri Hoang
,
Jacob Botimer
,
Wei Qiang Zhu
,
Ching-Chi Chang
,
Cheng-Hsun Lu
,
Junkang Zhu
,
Yaoyu Tao
,
Tianyu Wei
,
Naomi Kavi Motwani
,
Mani Yalamanchi
,
Ramya Yarlagadda
,
Sirisha Kale
,
Mark Flannigan
,
Allen Chan
,
Thungoc Tran
,
Sergey Y. Shumarayev
,
Zhengya Zhang
AIB 2.0 Interface to Provide Versatile Workload Acceleration.
VLSI Technology and Circuits
(2023)
Junkang Zhu
,
Yaoyu Tao
,
Zhengya Zhang
eNODE: Energy-Efficient and Low-Latency Edge Inference and Training of Neural ODEs.
HPCA
(2023)
Anjunyi Fan
,
Yihan Fu
,
Yaoyu Tao
,
Zhonghua Jin
,
Haiyue Han
,
Huiyu Liu
,
Yaojun Zhang
,
Bonan Yan
,
Yuchao Yang
,
Ru Huang
Hadamard product-based in-memory computing design for floating point neural network training.
Neuromorph. Comput. Eng.
3 (1) (2023)
Lianfeng Yu
,
Yaoyu Tao
,
Teng Zhang
,
Zeyu Wang
,
Xile Wang
,
Zelun Pan
,
Bowen Wang
,
Zhaokun Jing
,
Jiaxin Liu
,
Yuqi Li
,
Yihang Zhu
,
Bonan Yan
,
Yuchao Yang
Fast and reconfigurable sort-in-memory system enabled by memristors.
CoRR
(2023)
Lei Cai
,
Jing Wang
,
Lianfeng Yu
,
Bonan Yan
,
Yaoyu Tao
,
Yuchao Yang
Accelerating Neural-ODE Inference on FPGAs with Two-Stage Structured Pruning and History-based Stepsize Search.
FPGA
(2023)
Yaoyu Tao
,
Shuanghong Sun
,
Zhengya Zhang
Efficient Post-Processors for Improving Error-Correcting Performance of LDPC Codes.
CoRR
(2022)
Lianfeng Yu
,
Zhaokun Jing
,
Yuchao Yang
,
Yaoyu Tao
Fast and Scalable Memristive In-Memory Sorting with Column-Skipping Algorithm.
ISCAS
(2022)
Lianfeng Yu
,
Zhaokun Jing
,
Yuchao Yang
,
Yaoyu Tao
Fast and Scalable Memristive In-Memory Sorting with Column-Skipping Algorithm.
CoRR
(2022)
Yaoyu Tao
,
Cedric Choi
High-Throughput Split-Tree Architecture for Nonbinary SCL Polar Decoder.
CoRR
(2022)
Yaoyu Tao
,
Qi Wu
An Automated FPGA-based Framework for Rapid Prototyping of Nonbinary LDPC Codes.
CoRR
(2022)
Yaoyu Tao
,
Zhengya Zhang
HiMA: A Fast and Scalable History-based Memory Access Engine for Differentiable Neural Computer.
CoRR
(2022)
Yaoyu Tao
,
Cedric Choi
High-Throughput Split-Tree Architecture for Nonbinary SCL Polar Decoder.
ISCAS
(2022)
Yaoyu Tao
,
Zhengya Zhang
DNC-Aided SCL-Flip Decoding of Polar Codes.
GLOBECOM
(2021)
Yaoyu Tao
,
Sung-Gun Cho
,
Zhengya Zhang
A Configurable Successive-Cancellation List Polar Decoder Using Split-Tree Architecture.
IEEE J. Solid State Circuits
56 (2) (2021)
Yaoyu Tao
,
Zhengya Zhang
HiMA: A Fast and Scalable History-based Memory Access Engine for Differentiable Neural Computer.
MICRO
(2021)
Yaoyu Tao
,
Zhengya Zhang
DNC-Aided SCL-Flip Decoding of Polar Codes.
CoRR
(2021)
Yaoyu Tao
,
Sung-Gun Cho
,
Zhengya Zhang
Configurable Successive-Cancellation List Polar Decoder using Split-Tree Architecture in 40nm CMOS.
VLSI Circuits
(2019)
Yaoyu Tao
,
Qi Wu
An Automated FPGA-Based Framework for Rapid Prototyping of Nonbinary LDPC Codes.
ISCAS
(2019)
Yaoyu Tao
,
Shuanghong Sun
,
Zhengya Zhang
Efficient Post-Processors for Improving Error-Correcting Performance of LDPC Codes.
IEEE Trans. Circuits Syst. I Regul. Pap.
(10) (2019)
Youn Sung Park
,
Yaoyu Tao
,
Zhengya Zhang
A Fully Parallel Nonbinary LDPC Decoder With Fine-Grained Dynamic Clock Gating.
IEEE J. Solid State Circuits
50 (2) (2015)
Youn Sung Park
,
Yaoyu Tao
,
Shuanghong Sun
,
Zhengya Zhang
A 4.68Gb/s belief propagation polar decoder with bit-splitting register file.
VLSIC
(2014)
Youn Sung Park
,
Yaoyu Tao
,
Zhengya Zhang
A 1.15Gb/s fully parallel nonbinary LDPC decoder with fine-grained dynamic clock gating.
ISSCC
(2013)
Chia-Hsiang Chen
,
Yaoyu Tao
,
Zhengya Zhang
Efficient in situ error detection enabling diverse path coverage.
ISCAS
(2013)
Yaoyu Tao
,
Youn Sung Park
,
Zhengya Zhang
High-throughput architecture and implementation of regular (2, dc) nonbinary LDPC decoders.
ISCAS
(2012)